Semiconductors & IC Design
Imec scales NbTiN superconducting circuits to 30nm
Reported by eeNews Europe on 7 September 2026
Semiconductors & IC Design
Reported by eeNews Europe on 7 September 2026
Three metal levels is the detail here, not the junction count. Superconducting logic has never been short of clever devices; it has been short of a way to route them, and 3.8 million Josephson junctions per square centimetre with a 30nm NbTiN interconnect is imec doing to this field what it did to CMOS, turning a physics result into something with a design rule and a metal stack.
This is worth mapping now, well before the mandates appear. The scarce people are cryogenic test and packaging engineers and anyone who has laid out a superconducting circuit at all, and there are perhaps a few hundred of them in Europe, most sitting in quantum computing groups and national labs. If superconducting digital logic gets funded seriously that pool empties inside a year, and the firms who made an introduction early are the only ones who will move anybody.
Read the original at eeNews Europe .
This is one of the markets we recruit in every day. Semiconductor hiring turns on specifics: which node, which tool flow, which application, which customer. A shortlist assembled without understanding those distinctions wastes a hiring manager’s time, and they can tell within one CV.
Send the role, or send your CV, and it reaches Ramon rather than a queue. If it is not something we can do well, you will be told that straight away rather than a month from now.
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